The 74HC74 is a dual positive edge triggered CMOS input level D-type flip-flop. Individual data (nD), clock (nCP), set (nSD), and reset (nRD) inputs are provided, as are complementary nQ and nQ outputs.

Data at the nD-input that meets the LOW-to-HIGH clock transition's set-up and hold time requirements is stored in the flip-flop and appears at the nQ output. The circuit is highly tolerant to slower clock rise and fall times. This is due to the Schmitt-trigger action in the clock input. Inputs include clamp diodes enabling the use of current limiting resistors to interface inputs to voltages in excess of VCC.